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something wrong with my makefile about wildcard [Resolved]

I have a bunch of .c test source file in directory tests/. Now I want to compile and link them respectively and output the executable *.out in tests/. So I wrote a makefile, which didn't work.

# ...
TestDir := tests
TestSourceFile := $(shell sh -c "ls tests/*.c")
TestTargetFile := $(subst .c,.out,$(TestSourceFile))

TestFrame := testframe.o

TestNeededObjectFile := $(TestFrame) \
    + util.o \
    + tokennames.o \
    + lex.yy.o \
    + hex.o \

.PHONY: test-%

test-%: $(TestDir)/%.out
    $^

.PHONY: test

test: $(TestTargetFile)
    @for t in $(TestTargetFile); do \
        $$t ; \
    done

$(TestDir)/%.out: $(TestDir)/%.o $(TestNeededObjectFile)
    gcc -o $@ $^

%.o : %.c
    gcc -c $(CFLAGS) $^

clean:
    rm -rf *.o lextest *.yy.? *.tab.? *.output $(TokenNameFile) \
        $(TestDir)/*.out

When I run make test-add(add.c is in tests/), I am expecting to see add.out in tests/ but instead there is an error:

> make test-add
make: *** No rule to make target 'tests/add.out', needed by 'test-add'.  Stop.

I want to know how to write this makefile correctly and why this makefile is wrong.


Question Credit: Charles
Question Reference
Asked March 23, 2019
Tags: linux, make
Posted Under: Unix Linux
11 views
1 Answers

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